|
|
| |
|
|
|
|
|
| |
|
|
| |
 |
Driving Signals
|
|
|
In this section we will be seeing different drives features in VERA. We will be seeing following. Syntax of driving a signal is as below. |
| |
|
|
|
|
[delay] signal_name range drive_operator expression; |
| |
|
|
|
|
Where |
|
|
Delay is optional and when specified the signal signal_name will be driven after delay number of cycles. |
|
|
signal_name is signal that needs to be driven |
|
|
range specifies which bits of the signal are driven. |
|
|
drive_operator must be either =, which specifies a blocking drive, or <=, which specifies a non-blocking drive. |
|
|
expression can be any valid Vera expression. |
| |
|
|
| |
|
|
|
|
We will be seeing following in detail |
| |
|
|
|
|
- Blocking/Non Blocking drive
- Soft/Strong drive
- Void Drives
|
| |
|
|
|
|
|
| |
|
|
| |
 |
Blocking And Non-Blocking Drives
|
|
|
There are two types of drives specified by the drive operator: blocking and non-blocking. Blocking drives suspend Vera execution until the statement completes. Note that the clock edge (NHOLD or PHOLD) that the drive signal is associated with is used for counting synchronized edges during suspension. Once the statement completes, Vera execution resumes. Non-blocking drives schedule the drive at a future synchronized edge and Vera execution continues. When the specified synchronized edge occurs, the drive is executed. |
| |
|
|
|
|
- = : When used for assignment, then it is blocking
- <= : When used for assignment, then it is non-blocking. This is same as Verilog.
|
| |
|
|
| |
|
Strong And Soft Drives
|
|
|
There are two strengths of drives: strong (default) and soft. Till now we have seen strong drive. |
| |
|
|
|
|
Syntax |
| |
|
|
|
|
[delay] signal_name range drive_operator expression soft; |
| |
|
|
|
|
A given signal should only be driven by a single strong drive at any given time. Multiple strong drives at the same time result in conflicting drives. Conflicting strong drives drive the signal to X and result in a simulation error. However, conflicting soft drives can drive a signal to X without causing a simulation error. Finally, if a signal is driven by a conflicting strong and soft drive, the strong drive dominates and the signal is driven by the strong drive. |
| |
|
|
| |
|
Void Drives
|
|
|
Drives block until the appropriate driving clock edge occurs. If you want to wait for this clock edge without actually driving the signal, use the void construct. |
| |
|
|
|
|
Syntax |
|
|
delay signal_name = void; |
| |
|
|
| |
|
|
| |
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
|
|
Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
|
Do you have any Comment? mail me at:deepak@asic-world.com
|
|
