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Ignore bin
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A set of values or transitions associated with a coverage point can be explicitly excluded from coverage by specifying them as ignore_bins. Ignore bin syntax can be used for dynamic coverage bin disabling and can be used for modelling coverage shape syntax of VERA. |
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Example : ignore bins creation
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1 module test();
2
3 logic [2:0] addr;
4 reg ce;
5
6 covergroup address_cov () @ (posedge ce);
7 ADDRESS : coverpoint addr {
8 ignore_bins ignore_tran = (0=>2=>1);
9 ignore_bins ignore_vals = {0,1,2,3};
10 }
11 endgroup
12
13 address_cov my_cov = new();
14
15 initial begin
16 ce <= 0;
17 $monitor("ce %b addr 8'h%x",ce,addr);
18 repeat (10) begin
19 ce <= 1;
20 addr <= $urandom_range(0,7);
21 #10 ;
22 ce <= 0;
23 #10 ;
24 end
25 end
26
27 endmodule
You could download file ignore_bin.sv here
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Simulation : ignore bins creation
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ce 1 addr 8'h6
ce 0 addr 8'h6
ce 1 addr 8'h4
ce 0 addr 8'h4
ce 1 addr 8'h5
ce 0 addr 8'h5
ce 1 addr 8'h2
ce 0 addr 8'h2
ce 1 addr 8'h3
ce 0 addr 8'h3
ce 1 addr 8'h7
ce 0 addr 8'h7
ce 1 addr 8'h0
ce 0 addr 8'h0
ce 1 addr 8'h7
ce 0 addr 8'h7
ce 1 addr 8'h6
ce 0 addr 8'h6
ce 1 addr 8'h3
ce 0 addr 8'h3
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Report : ignore bins creation
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===========================================================
Group : test::address_cov
===========================================================
SCORE WEIGHT GOAL
100.00 1 100
-----------------------------------------------------------
Summary for Group test::address_cov
CATEGORY EXPECTED UNCOVERED COVERED PERCENT
Variables 4 -3 7 100.00
Variables for Group test::address_cov
VARIABLE EXPECTED UNCOVERED COVERED PERCENT GOAL WEIGHT
ADDRESS 4 -3 7 100.00 100 1
-----------------------------------------------------------
Summary for Variable ADDRESS
CATEGORY EXPECTED UNCOVERED COVERED PERCENT
Automatically Generated Bins 4 -3 7 100.00
Automatically Generated Bins for ADDRESS
Excluded/Illegal bins
NAME COUNT
ignore_tran 0 Excluded
ignore_vals 0 Excluded
[auto[0] - auto[3]] -- Excluded (4 bins)
Covered bins
NAME COUNT AT LEAST
auto[0] 1 1
auto[2] 1 1
auto[3] 2 1
auto[4] 1 1
auto[5] 1 1
auto[6] 2 1
auto[7] 2 1
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Copyright © 1998-2014 |
Deepak Kumar Tala - All rights reserved |
Do you have any Comment? mail me at:deepak@asic-world.com
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